* @param arr 待排序数组
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When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
In Asia excluding Japan, organic revenue slipped 4% for the year. Performance improved in the second half, however, with organic growth of 2% in the third quarter and 1% in the fourth quarter, reversing the first-half downturn.